A phase-locked loop (PLL) is a circuit that generates a signal that is a function of a reference signal. PLLs are widely used in electrical systems, particularly communication systems, at least for their ability to perform various circuit functions, such as generating programmable output frequencies, and performing frequency modulation and demodulation. PLLs are also useful for performing carrier signal regeneration, generating clock signals, and performing clock recovery and skew compensation.
PLLs require a certain amount of time in operation to lock to a desired frequency when the PLL is required to change from one frequency to another frequency. This may be referred to as the “lock time.” The lock time of the PLL can be a particular requirement of an intended application of the PLL. A settling time can refer to the time needed for the PLL to settle to a desired frequency within a desired frequency error tolerance window. The terms, locking time and settling time, may loosely refer to the same time necessary for the PLL to lock.